In an electric power system, analog voltage and current values are obtained from a particular source thereof, including, as one example, power transmission lines. The voltage and/or current signals which are typically continuous from the transmission line are applied through transformers and then processed by protective relay systems in order to ensure proper operation of the electric power system and prevent harm to the system by various kinds of faults. In many cases, the protective relays use digital signal processing, which requires the conversion of the analog data from the transmission line to corresponding digital data, typically by conventional methods of sampling and analog-to-digital conversion. Typically, it is important that the phase relationship between the signals be maintained. The calculation of power, for instance, from voltage and current information is inaccurate if there is a phase shift or delay between the voltage and current signals.
Analog/digital conversion and multiplexing typically introduce a time delay between the data on the first and last channels in a multi-channel data system. The time delay corresponds to a particular value of phase skew when the acquired signals are periodic. If, for instance, there are six channels of analog data in a particular system, with an analog/digital conversion and multiplexing time per channel of approximately 25 microseconds, which corresponds to 0.5 electrical degrees at 60 hertz, the total phase skew for the entire system, i.e. between the first and last channels, will be 2.5 electrical degrees. If no phase compensation is made, it will appear, incorrectly, as though the input signals differ in phase by 2.5 degrees. This is typically not acceptable.
A conventional and accepted method to prevent such a phase shift caused by multiplexing and analog/digital conversion, is by using sample and hold gates for each channel. Such a system is shown in FIG. 1. High voltage and current values on input lines 12-17 (six channels are shown as an example) are applied to transformers 18--18, the output lines of which are applied to low pass filters 20--20. From there, the signals are applied to sample and hold gates 22--22, controlled by a clock-based controller 24, which produces a fixed sequence of control signals. The outputs of the sample and hold gates 22--22 are then applied to a multiplexer 26, the output of which is applied to an analog-to-digital (A/D) converter 28. Both the multiplexer 26 and the A/D converter 28 are controlled by controller 24. The resulting digital output signals from the A/D converter 28 are applied to signal processor 30. The six channels of data are hence sampled simultaneously, although it is assumed that any delays introduced by the analog filters of each channel are equal.
However, sample and hold gates are expensive and themselves introduce some error into the processing of the signals, as well as occupying circuit board space. It is recognized that, as another solution, an A/D converter could be used on each channel, but that would add significant expense to the overall cost of the system. In still another approach, all the sample and hold gates of FIG. 1 could be eliminated, with the processor itself being adapted to remove the phase shift. In a particular example, digital filters are provided for each channel in the processor, with the filters having different delays to offset the skew for each channel. This approach does, however, add a significant computational burden to the processor. Further, the design of the filters for each channel specifically depends on the respective multiplexing and A/D conversion times.
Hence, there is a need for a signal processing system in which multi-channel analog signals are converted into digital signals and multiplexed without significant phase skew being introduced between the channels.